New PCB design tools tackling environmental compliance!

A number of PCB design tools, e.g. Cadence Allegro and OrCAD, have been updated to address environmental concerns.

As well as adhering to RoHS/WEEE regulations by using components that are low in lead, mercury and a number of other toxic chemicals, there are other ways to "go green," for example by developing systems that optimise energy efficiency without compromising performance. The new Orcad and Allegro PCB design products allow engineers to do this very effectively, hence their popularity.

One improvement has been the inclusion of IC (integrated circuit) power delivery analysis. This analyses power flow in the system using 3D sampling of power, signal and ground signals. It allows the user to optimise the impedance voltage of the PDN (power distribution network) while keeping voltage ripple to a minimum.

This allows engineers to develop high-speed, low-power FPGA designs which meet environmental compliance, without affecting productivity.

New technology – 3D integrated circuits

PCB designers are looking at various new technologies to help create environmentally compliant products. 3D integrated circuits (often shortened to 3D IC) are one such area. A 3D IC is an electronic chip in which integration of active components is achieved in layers, both horizontally and vertically. Although the technology is still in its early stages, it is generating a lot of excitement.

There are several ways to manufacture a 3D IC. All start from the same substrate, a semiconductor wafer. This is a thin slice of silicon crystal (or equivalent product) into which microelectronic devices are implanted. It then undergoes various fabrication processes.

Monolithic 3D ICs involve the layering of electronic components and their connections onto a single wafer, which is then separated into individual dies (diced) to create a 3D circuit.

The technology is limited because of the heat involved in its fabrication.

In wafer-on-wafer ICs, components are built onto two or more wafers, which are then thinned, aligned, bonded and diced. Vertical connections (called through-silicon vias or TSVs) pass through the layers. A variation on this is the die-on-wafer technique. Die-on-die ICs are also being investigated; these involve the integration of components onto individual dies.

Environmental benefits of 3D-ICs

Because of their impact on the environmental compliance of the resulting FPGA designs, 3D integrated circuits are generating a lot of excitement. They have a much smaller footprint than conventional ICs, allowing a lot of functionality in a tiny space. This minimises use of materials while allowing development of very powerful devices. Also, because connections are much shorter, there is minimal impedance and faster speed. Significantly, power consumption is dramatically reduced – by up to 100 times with a "signal on" chip. This not only reduces power consumption and operating costs, it also reduces wear-and-tear. Less heat is generated, meaning longer battery life and fewer components ending up in landfill sites.

When it comes to FPGA design, environmental compliance can take many forms, from using lead-free microprocessors to rethinking of the entire product design. It behoves all engineers to behave in an environmentally compliant manner – not least because it leads to increased revenue from likewise minded customers. If you need help creating environmentally compliant PCB designs, we at Enventure Technologies can help.

 http://technology.ezinemark.com/how-new-pcb-design-tools-are-tackling-environmental-compliance-171f714e371.html