Padstacks

The SMT Padstack is easy -

• Top Land
• Top Solder Mask
• Top Paste Mask
• Top Assembly

Part 7 of this blog explains the Land Calculation for SMT land patterns, so let’s discuss Plated Through-hole calculations in this segment.

The Through-hole (PTH) Padstack is complex -

• Drill Hole
• Top Assembly
• Top Solder Mask
• Top Land
• Inner Land
• Plane Thermal Relief
• Plane Anti-pad (Clearance)
• Bottom Land
• Bottom Solder Mask
• Bottom Assembly

Here is a picture of a through-hole padstack.

PTH Padstack

The PTH padstack creation can be fully automated via the maximum lead diameter.

Round PTH Lead Rectangle PTH Lead

Rectangle PTH Lead

Square PTH Lead

In the IPC-2222 standard there is a hole size calculation chart -

IPC-2222 Table 9-3

 Once you calculate the hole size, the minimum annular ring is 0.05 mm.

IPC-2221 Minimum Annular Ring

Next we need to add the IPC-2221 Minimum Fabrication Allowance to the pad size.

IPC-2221 Table 9-1

So the Minimum Annular Ring X 2 + Minimum Fabrication Allowance + Maximum Lead + Hole Over Lead = Pad Diameter

Next we need to calculate the Plane Thermal Relief ID, OD and Spoke Width sizes.

Thermal Relief Calculations

The Plane Anti-pad or Plane Clearance is the same size as the Thermal Relief OD (Outside Diameter).

 

In both the SMT and PTH padstack, the IPC recommended Solder Mask and Paste Mask size is 1:1 scale of the Top and Bottom land size. The PCB fabrication shop can automatically oversize (swell) the solder mask to any size they need to insure high yield production per their specific manufacturing capabilities. This is where automation of padstack generation comes in. The entire concept is to generate a padstack that meets the environment class of your design specification.  

The IPC-7251 Through-hole land patterns have the capability of accommodating all three performance classifications.

Producibility Levels: When appropriate this standard will provide three design producibility levels of features, tolerances, measurements, assembly, testing of completion or verification of the manufacturing process that reflect progressive increases in sophistication of tooling, materials or processing and, therefore progressive increases in fabrication cost. These levels are:

• Level A General Design Producibility – Preferred [Maximum land\lead to hole relationship]
• Level B Moderate Design Producibility – Standard [Nominal land\lead to hole relationship]
• Level C High Design Producibility – Reduced [Least land\lead to hole relationship]

The producibility levels are not to be interpreted as a design requirement, but a method of communicating the degree of difficulty of a feature between design and fabrication/assembly facilities. The use of one level for a specific feature does not mean that other features must be of the same level. Selection should always be based on the minimum need, while recognizing that the precision, performance, conductive pattern density, equipment, assembly and testing requirements determine the design producibility level. The numbers listed within the tables of IPC-7251 are to be used as a guide in determining what the level of producibility will be for any feature. The specific requirement for any feature that must be controlled on the end item shall be specified on the master drawing of the printed board or the printed board assembly drawing.

Download the IPC-7251 padstack charts here - AppNote 10835: IPC-7251 Padstack Charts

Density Level A: Maximum Land/Lead to Hole Relationship – The ‘maximum’ land pattern conditions have been developed to accommodate the most robust producability of the solder application method. The geometry furnished may provide a wider process window for solder processing. The level A land patterns are usually associated with low component density product applications.

Density Level B: Nominal Land/Lead to Hole Relationship – Products with a moderate level of component density may consider adapting the ‘median’ land pattern geometry. The median land patterns furnished for all device families will provide a robust solder attachment condition for most soldering processes and should provide a condition suitable for wave, dip, drag or reflow soldering.

Density Level C: Least Land/Lead to Hole Relationship – High component density typical of portable and hand-held product applications may consider the ‘minimum’ land pattern geometry variation. Selection of the minimum land pattern geometry may not be suitable for all product use categories.

The “Proportional” PTH Padstacks are a mixture combination of all the IPC Levels. Small holes use Level C and medium hole sizes use Level B and large hole sizes use Level A. When a hole size exceeds 2 mm, the Proportional padstack annular ring will incrementally grow with every hole size.  I have used the proportional padstacks for the past 20 years and it is proven technology that works. Its flexible flow is more compliant with the PTH components and their pin pitch density. The main point is that Proportional padstacks meet or exceed the IPC-7251 standard.

 

Download the Proportional padstack chart here - Appnote 10836: Proportional Through-hole Padstacks

 

Note: the “Producibility Levels” are not necessarily related to the IPC Preformance Classifications. i.e.: The IPC-7251 land patterns have the capability of accommodating all three performance classifications.

IPC Performance Classifications: Three general end-product classes have been established to reflect progressive increases in sophistication, functional performance requirements and testing/inspection frequency. It should be recognized that there may be an overlap of equipment between classes.

The end product user has the responsibility for determining the ‘‘Use Category’’ or ‘‘Class’’ to which the product belongs. The contract between user and supplier shall specify the ‘‘Class’’ required and indicate any exceptions or additional requirements to the parameters, where appropriate.

Class 1 General Electronic Products – Includes consumer products, some computer and computer peripherals, and hardware suitable for applications where the major requirement is function of the completed assembly.

Class 2 Dedicated Service Electronic – Products Includes communications equipment, sophisticated business machines, and instruments where high performance and extended life is required, and for which uninterrupted service is desired but not mandatory. Typically the end-use environment would not cause failures.

Class 3 High Reliability Electronic Products – Includes all equipment where continued performance or performance-on-demand is mandatory. Equipment downtime cannot be tolerated, end-use environment may be uncommonly harsh, and the equipment must function when required, such as life support systems and other critical systems.

http://blogs.mentor.com/tom-hausherr/blog/2010/12/02/pcb-design-perfection-starts-in-the-cad-library-part-8/

Placement Courtyards

The IPC-7351B standard only focuses on 2 two major aspects of the CAD library:

1. The land size and spacing
2. Placement courtyard

All of the other aspects of the CAD library part such as silkscreen & assembly outlines, polarity markings, ref des, centroid marking, etc. are considered user definable drafting items. This includes all of the rules that pertain to these items such as line widths, silkscreen to land spacing, polarity sizes, ref des height, etc. are not part of the standard. But the Placement Courtyard Boundary is defined in the IPC-7351B standard, but the line width used to create the outline is user definable. The default solder mask and paste mask values are mentioned in the IPC-7351 as to be 1:1 scale of the land size, but this is only a recommendation.

See Courtyard Determination pictures below to see the 3 outlines defined by IPC-7351 as:

1. Maximum Component Boundary
2. Minimum Placement Courtyard
3. Courtyard Manufacturing Zone

Surface Mount Courtyard Determination

Plated Through-hole Courtyard Determination

Here are the standard spacing rules from the Maximum Component Boundary to the Minimum Placement Courtyard:

1. Least Environment = 0.1 mm
2. Nominal Environment = 0.25 mm
3. Most Environment = 0.5 mm

There are different Placement Courtyard spacing rules for Grid Array packages based on ball size:

1. Ball size above 0.50 mm = 2 mm
2. Ball size between 0.50 mm & 0.25 mm = 1 mm
3. Ball size below 0.25 mm = 0.5 mm

One of the key aspects of the placement courtyard is that it allows room for rework. In the case of the BGA’s, the larger the Ball Size, the larger the heat nozzles and removal equipment is for getting around and under the component to unsolder the contacts. An important note to make here is that if you have no intentions of ever reworking (remove and replace) a BGA component then the 2 mm placement courtyard is not necessary and a 0.5 mm courtyard excess is OK. This also is relevant to the “Most Environment” where the minimum courtyard excess is 0.5 mm on all SMT land patterns. i.e.: the military and medical instrument industry might use the Most Environment and require “Class 3″ High Reliability Electronic Products where continued high performance is critical and product downtime cannot be tolerated. The “Class 3″ fabrication is very expensive and if a component on the PCB fails, rework becomes necessary to reduce cost. Rework requires additional land pattern placement courtyard excess to allow adequate space for rework equipment. Alternatively, the “Least Environment” for High Density PCB Layout, like handheld devices, has a courtyard excess of 0.1 mm with no room for rework equipment. So if a component fails in your Cellular Phone it will not be sent back to the shop for rework, but instead, it will be discarded.

The Placement Courtyards can be placed next to each other so the outline overlaps, however you need to discuss this with your assembly shop if they require an additional Manufacturing Zone for their process. The Placement Courtyard round-off snap grid is 0.5 mm. The question of “why don’t you place the silkscreen outline outside the land pattern boundary” is a FAQ and this is the answer - ”It is important that all silkscreen outline data be located inside the Placement Courtyard”.

This includes the Post Assembly Inspection Dot, which sometimes gets partially placed outside the placement courtyard. This is why in the upcoming IPC-2614 for Board Fabrication Documentation and drafting standards the “Post Assembly Inspection Dot” will become the “Post Assembly Inspection Line” and it will look like this to keep them inside the Placement Courtyard:

DIP & SOP Post Assembly Inspection Line

The Placement Courtyard or Courtyard Excess is the smallest area that provides a minimum electrical and mechanical clearance of the maximum extremities of the land pattern and/or the component body. However it is the responsibility of the user to verify the land patterns used for achieving an undisturbed mounting process including testing and an ensured reliability for the product stress conditions in use.

For many through-hole parts and connectors, the placement courtyard will follow the contour of the component body outline and land pattern.

Axial Lead Courtyard

Most Enterprise CAD tools like Mentor Expedition have a different DRC checking feature that the user can define the component type to component type spacing rules. In this case, the placement courtyard excess should be turned off and the placement courtyard would be identical to the Maximum Component Boundary.

Enterprise CAD Tool Courtyard

The Enterprise CAD tool placement courtyard is not defined in the IPC-7351 standard. This concept is based on the Enterprise CAD tools ability to determine various component body to body spacing that is user definable.

http://blogs.mentor.com/tom-hausherr/blog/2010/11/18/pcb-design-perfection-starts-in-the-cad-library-part-6/

Design all your electronics exclusively

Designing from bin to electric board has gained lot of importance as this is the trend today which every lay man has to follow or else he is not recognized as trend follower. You are surrounded by designing from the time you open your eye till the time you close your eye. PCB i.e. Printed Circuit Board is used to mechanically support and electrically connect an electronic component which uses conductive pathways. So even PCB design which is the appropriate designing of circuit boards without disturbing its electrical pathway. The generic standard of printed circuit board is IPC-2221A regardless of whether the PCB board is single sided, double sided or multi layered and while designing you shouldn’t forget this.

When it comes to PCB layout, there are some guidelines which a designer has to follow and i.e. ground planes must be used to minimize the voltages as the ground current flows through traces which have voltage differences at different points along the ground path. Power ground and control ground must be kept separately. The areas and loops containing high frequency switching currents must be minimized. You must know the details of circuit operation when you are doing a PCB design.

Cadence design system is electronic design automation software and provides engineering services company. Now cadence designs are such which are industry’s leading designs of Printed circuit board and has to follow the regulations of cadence system. So it becomes very necessary to design the PCB in a right manner. And also the instruction while designing needs to be followed.

For your design to get the perfect sense the cadence layout needs to be just right. Cadence quick view data is high performing and easy to use system for viewing and super imposing data. It eliminates job deck errors and enables off-setting, co-ordinate scaling, rotation and comparing multiple datasets. It also enables powerful and fast measurement and analysis. With this it also supports multiple formats which make the task of electrical designing easier and faster. Cadence design system develops software and hardware. And also it licenses the software, sells and leases hardware technology and so it becomes of utmost importance to use the proper layout.

PCB design is connected to allegro design as then it offers the leading physical and electrical constraint and interconnected routing system. It accepts fully integrated design flow which includes library creation, interactive routing, design creation, placement, editing and much more. Benefits of allegro layout are that it provides scalable, full featured PCB design. To reduce design iteration it enables constraint driven design flow. It also provides constraint management environment so that your designs can be perfect. It provides component placements, floor planning.

You should always go for professional and high quality pcb designers which will reduce your efforts and can also benefit you in many ways.

PCB design principle and interference

Printed circuit board (PCB) support one of component of the circuit and device in the electronic product. It offers the electric connection between circuit component and device. With the development at full speed in technology of electricity, the density of PCB is higher and higher. The quality that PCB designs opposes interference ability and exerts a tremendous influence. So, while designing PCB. Must observe the general principle that PCB design, should also accord with the requirement designed in anti-interference.

General principle that PCB designs

Want, make electronic circuit obtain best performance, cloth of components and parts and wire it lays to be very important. PCB high quality for design, with low fabrication cost. Should follow the following general principle:

1. Overall arrangement

First of all, should consider PCB size. When PCB is oversized, prints the long lines, impedance increases, the ability to resist noise drops, the cost increases too; Too small, it is not good to dispel the heat, the lines are easy to be interfered with that and neighbouring. After confirming PCB size. Position special component again. Finally, according to the function unit of the circuit, carry on the overall arrangement to all components and parts of the circuit.

Observe the following principles while positioning special component:

(1)Shorten the line between the high-frequency components and parts as much as possible, distribution parameter and mutual electromagnetism of trying to reduce them are interfered with. It is easy to be can’t suffer too near each other by the components and parts interfered with, should try hard to be far away from to input and export the component.

(2)There may be difference of higher electric potential between some components and parts or wire, should strengthen the distance between them, so as not to discharge and draw shorting out in surprise. The components and parts with high voltage should try hard to fix up the difficult place to touch of hand in the debugging.

(3)The weight exceeds the components and parts of 15g, should be fixed with the support, then weld. Those large and heavy components and parts with much caloric value, it is unsuitable to put in printing plate making, and should install on the machine case baseplate of the complete machine, and should consider the heat-dissipating problem. The temperature sensing component should be far away from generating heat the component.

(4)Should consider the structure of the complete machine is required as to the overall arrangement of adjustable components such as the potentiometer, adjustable inductor coil, variable condenser, microswitch,etc.. If regulate in the machine, should put in printing plate making conveniently in the place to regulate; If regulate outside the machine, its position wants and regulates the position on the machine case panel of knob and suit.

(5)Should reserve and print and pull and orientate the hole and position where the fixed support takes up.

According to the function unit of the circuit. While carrying on the overall arrangement to all components and parts of the circuit, should accord with the following principles:

(1)Arrange the position of each function circuit unit according to the procedure of the circuit, make the convenient signal of the overall arrangement circulate, and make the signal keep unanimous direction as much as possible.

(2)Regard key component of each function circuit as the centre, carry on the overall arrangement around it. The components and parts should be even, arrange on PCB neatly, compactly. Try hard to reduce and shorten the lead wire between all components and parts and connect.

(3)The circuit working under high frequency, should consider the distribution parameter between the components and parts. The general circuit should make the components and parts arrange parallelly as much as possible. In this way, not only esthetic. And it is easy to hold and weld. Easy to produce in batches.

(4)The components and parts located in edge of the circuit board, are seldom smaller than 2mm from the edge of the circuit board. The best shape on board of the circuit is the rectangle. The aspect ratio is 3: Twenty percent 4: 3. The circuit board when the size is greater than 200×150mm. Should consider the mechanical intensity that the circuit board receives.

2. Wiring

The principle of connecting up is as follows:

(1)Should try hard to avoid to input the wire used for output end adjacently and parallelly. You had better add the ground wire of space, so as to avoid and feedback the lotus root to shut.

(2)Printing the minimum width of taking a photograph of wire mainly glues and enclose the intensity and electric current value flowing through them and determine when pulled by wire and insulating base. Look on copper as foil thickness When 0.05mm, width are 1 15mm. Through the electric current of 2A, the temperature will not be higher than 3 , so. The wire width is that 1.5mm can meet the demands. As to the integrated circuit, especially digital circuit, usually select 0.02~0.3mm wire width. Certainly, so long as allow, or use the wide thread as much as possible. Especially cable and ground wire. The minimum interval of the wire is mainly decided by insulating resistance of space and puncturing the voltage under the worst situation. As to the integrated circuit, especially digital circuit, so long as the craft is allowed, can enable the interval as little as 5~8mm.

(3)Print the wire corner to generally fetch circularly, and the right angle or contained angle will influence electric performance in the high-frequency circuit. In addition, try hard to avoid using the copper foil of large area, otherwise. When being heated for a long time, the foil of copper incident swells and losses the phenomenon. When must use the copper foil of large area, had better use the bar trellisedly. Help to get rid of among copper foil and base plate like this the binder is heated the volatile gas produced.

3.Pad

The centre bore of pad is slightly larger than the diameter of lead wire of the device. It is welded that the pad is too large and apt to take shape emptily. The external diameter D of the pad is seldom smaller than (d +1.2) Mm, among them d is the aperture of the lead wire. To the digital circuit of the high density, the minimum diameter of the pad is desirable (d +1.0) mm.

PCB and circuit interference-free measure

The anti-interference on board of the printed circuit is designed there are close relations with the concrete circuit, make some explanation on several daily measures designed in PCB anti-interference alone here.

1.The cable is designed

According to printing the size of the board electric current of circuit, the cable width of the added rent that try hard, reduce the cycle resistance. At the same time, make the trends of the cable, ground wire keep the same with direction in which the data transmits, contribute to strengthening the ability to resist noise like this.

2. The ground wire is designed

The principle that the ground wire is designed is:

(1)The figure is separated from simulation. If have both logical circuit and linear circuit on the circuit board, should make them try hard to separate. Circuit of low frequency should try hard to adopt and click and link only, connect up and can link the ground after connecting partly in series while having difficulties actually. High-frequency circuit should adopt some connect earthing in series more, ground wire should short renting, try hard, use the intersection of bar and large the intersection of area and the intersection of place and foil trellised around the high-frequency component.

(2)The earth connection should try hard to add thickly. If the earth connection is with the lines that are threaded very much, ground the electric potential and vary with electric current, make it make an uproar performance lower not to resist. So should add the earth connection thickly, enable it to pass and 3 times as much as that of printing the permission electric current on plate making. If possible, the earth connection should be in above 2~3mm.

(3)The earth connection forms and closes the cycle. The seal plate making only composed of digital circuits, its cycle of group of cloth of earthed circuit can mostly improve the ability to resist noise.

3.Return the electric capacity of the lotus root to dispose

One of the regular methods that PCB designs is printing each key position of plate making and disposing appropriate returning the electric capacity of the lotus root.

The capacitive general disposition principle is to return the lotus root:

(1)The input terminus of the power steps the electrolytic capacitor which connects 10 100uf. If possible, it is better to connect above 100uF.

(2)Each IC chip should assign the porcelain of one 0.01pF a slice of electric capacity in principle, in case of it is not enough to print space of plate making, very every 4~8 chips assign 1 10pF for one but electric capacity.

(3)Make an uproar weak ability resisting and power change old device shut off, such as RAM, ROM store the device, should insert and return the electric capacity of the lotus root directly between cable of the chip and ground wire.

(4)The lead wire of electric capacity can’t be too long, there can’t be lead wire in the electric capacity of especially high-frequency bypass.

In addition, should also pay attention to the following two points:

(1)While there are components such as contactor, relay, button,etc. in plate making to print. Will produce greater spark and discharge, must absorb and discharge the electric current by RC circuit that figures show while operating them. General R fetches 1 2K, C fetches 2.2 47UF.

(2)Input impedance of CMOS very high, and apt to receive reaction, while using to needn’t carry, take earthing or connect straight power.

http://electronics-tech.com/pcb-design-principle-and-interference-free-measure/